I'm an associate professor at Instituto Superior Técnico (Universidade de Lisboa) and researcher of the Distributed Systems Group at INESC-ID.
Current research interests: System Support for Persistent Memory, Exascale Computing, Transactional Memory, Consistency and Replication (including Blockchain Consensus Protocols).
I'm currently involved in the European joint Effort toward a Highly Productive Programming Environment for Heterogeneous Exascale Computing (EPEEC), an H2020 project.
This year I'm teaching Introduction to Computer Architectures and Distributed Systems (undergrad. level).
News
- May/2025: Really excited that our 6th Workshop on Heterogeneity and Memory Systems (HMEM 2025) will again be part of the SC conference. Please consider submitting (deadline: August 26th).
- Jan/2025: I'm part of the program committee of the 4th Workshop on Heterogeneous Composable and Disaggregated Systems, co-located with ASPLOS/EUROSYS 2025. Submission deadline: January 20, 2025.
- Dec/2024: Our paper "Better memory tiering, right from the first placement" was accepted in ICPE 2025. This is joint work between our team (Joao Póvoas, André Gonçalves, myself) with Huawei Poland.
- Sep/2024: João Póvoas received the Best Student Paper award at Inforum'24 for our paper: "Optimizing OS Support for Dynamic Page Placement in Heterogeneous Memory Architectures". Congratulations, João!
- Sep/2024: Co-chairing the 5th Workshop on Heterogeneous Memory Systems (HMEM 2024), this time co-located with IEEE CLUSTER 2024.
- Jun/2024: Very happy to co-organize the 1st Workshop on Distributed Computing with Emerging Hardware Technology (EMERALD), co-located with SPAA/PODC 2024.
Some research ideas where I'm currently working on
Tiered page placement for CXL-based systems
- Read our ACM/SPEC ICPE 2025 paper on "Better Memory Tiering, Right from the First Placement"
- Check our talk at the HCDS workshop at ASPLOS/Eurosys 2025
- We also got a best paper award at Inforum 2025 (national conference)
With João Póvoas
Persistent memory transactions running on latest-gen. hardware-transactional memory
Our arxiv preprint "DUMBO: Making durable read-only transactions fly on hardware transactional memory"
With Paolo Romano, Alexandro Baldassin, Daniel Castro
Want to work with me?
These smart students are currently working with me: Nuno Alves (MSc), Alexandre Bento (MSc), José Esteves (MSc), Diogo Pacheco (PhD), André Libório (MSc), José Póvoas (post-MSc), Tomás Simões (BSc).
Take a look here to know about some possible thesis topics. Feel free to drop me an email.
Selected Publications
Better memory tiering, right from the first placement
Joao Póvoas, João Barreto, André Gonçalves (INESC-ID, IST, ULisboa),
Bartosz Chominski, Fedar Karabeinikau, Maciej Maciejewski, Jakub Schmiegel, Kostiantyn Storozhuk (Huawei)
ICPE 2025 (to appear)
NimbleChain: Speeding up cryptocurrencies in general-purpose permissionless blockchains blockchains
Paulo Silva, Miguel Matos, João Barreto
ACM Distributed Ledger Technologies, 2022
Persistent Memory: A Survey of Programming Support and Implementations
Alexandro Baldassin, João Barreto, Daniel Castro, Paolo Romano
ACM Computing Surveys (ACM CSUR), 2021
SPHT: Scalable Persistent Hardware Transactions
Daniel Castro, Alexandro Baldassin, João Barreto, Paolo Romano
FAST 2021
Impact of geo-distribution and mining pools on blockchains: a study of Ethereum.
Paulo Silva, David Vavřička, João Barreto, Miguel Matos
DSN 2020
Bandwidth-Aware Page Placement in NUMA
David Gureya, João Neto, Reza Karimi, João Barreto, Pramod Bhatotia, Vivien Quema, Rodrigo Rodrigues, Paolo Romano, and Vladimir Vlassov
IPDPS 2020
Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures.
R. Filipe, S. Issa, P.Romano, J. Barreto
PPoPP. 2019
Hardware Transactional Memory meets Persistent Memory.
D. Castro, J. Barreto and P. Romano.
IPDPS. 2018
Extended version in Journal of Parallel and Distributed Computing, Volume 130, 2019
RUBIC: Online Parallelism Tuning for Collocated Transactional Memory Applications
Amin Mohtasham and João Barreto
SPAA 2016
Nested Parallelism in Transactional Memory
Ricardo Filipe and João Barreto
Book chapter in "Transactional Memory. Foundations, Algorithms, Tools, and Applications". Springer, ISBN: 978-3-319-14719-2.
Unifying Thread-Level Speculation and Transactional Memory
João Barreto, Aleksandar Dragojevic, Paulo Ferreira, Ricardo Filipe and Rachid Guerraoui
Middleware, 2012 (Best paper award)
Hash Challenges: stretching the limits of compare-by-hash in distributed data deduplication
João Barreto, Luis Veiga, Paulo Ferreira
Information Processing Letters, Elsevier, Volume 112, Issue 10, 31 May 2012.
Leveraging Parallel Nesting in Transactional Memory
João Barreto, Aleksandar Dragojevic, Paulo Ferreira, Rachid Guerraoui, Michal Kapalka
PPoPP 2010
Efficient Locally Trackable Deduplication in Replicated Systems
João Barreto, Paulo Ferreira
Middleware 2009
Version Vector Weighted Voting Protocol: efficient and fault-tolerant commitment for weakly connected replicas
João Barreto, Paulo Ferreira
Concurrency and Computation: Practice and Experience, Volume 19, Issue 17, 2007
How to reach me
Where to find me: Room 607 at INESC-ID (Alameda) or Room 2N3.13 (Tagus)
Telephone: +351 21 310 02 92 (Alameda), +351 21 423 32 57 (Taguspark)
Fax: +351 21 314 58 43
Address: Rua Alves Redol 9, sala 607, 1000-029 Lisboa, Portugal
Email: joao.barreto at tecnico.ulisboa.pt