The 8th Workshop on the Theory of Transactional Memory (WTTM) is a forum to foster exchanges, discussions, and disseminations among researchers on theoretical challenges and recent achievements in the context of concurrent computing, with an emphasis on transactional memory.
Transactional Memory (TM) aims at making parallel programming more programmer friendly by providing an alternative synchronization mechanism to traditional lock-based concurrency. TM research has led to hardware TM implementations on both commodity and high performance computing microprocessors, as well as to TM integration in mainstream programming languages (e.g., C, C++) and leading open source compilers (e.g., GCC).
From a theoretical perspective, the TM abstraction raises several challenges in the way we view synchronization as well as in the way we implement it. A major goal of the workshop is to explore new directions and approaches for reasoning about Transactional Memory.
Topics of interest include, but are not limited to:
We solicit submissions describing research results and/or position papers relevant to the theory of concurrent computing with an emphasis on transactional memory.
Submissions should be written in English and in PDF format. Submissions should include: a title, the authors' names and their affiliations, and the contact author's email. Each submission must not exceed four single-column pages (excluding references) which will describe the results. Additional necessary details may be included in an appendix which will be read at the discretion of the program committee.
Papers are to be submitted electronically at https://easychair.org/conferences/?conf=wttm2016
The final version of the accepted papers will appear on the workshop's web site. These papers will be available to the participants in electronic format during the workshop. WTTM does not publish proceedings, so accepted papers may appear in other venues as well.
Fences and RMRs Required for Synchronization |
Hagit Attiya, Technion, Israel |
Linearizability of Persistent Memory Objects |
Michael Scott, University of Rochester, USA |
POWER8's HTM: Architecture and Implementation |
Derek Williams, IBM |
Hagit Attiya | Technion, Israel |
Michael Bond | Ohio State University, USA |
Stephan Diestelhorst | ARM, UK |
Vincent Gramoli | NICTA & University of Sydney, Australia |
Rachid Guerraoui | EPFL, Switzerland |
Danny Hendler | Ben-Gurion University, Israel |
Maurice Herlihy | Brown University, USA |
Alex Kogan | Oracle Labs, USA |
Alexander Matveev | MIT, USA |
Sebastiano Peluso | Virginia Tech, USA |
Binoy Ravindran (PC Chair) | Virginia Tech, USA |
Michael Spear | Lehigh University, USA |
Time | Authors | Paper | |
---|---|---|---|
09h05-09h10 | Opening remarks | ||
Session chair: Binoy Ravindran | |||
09h10-10h00 | Michael Scott (University of Rochester, USA) | Keynote: Linearizability of Persistent Memory Objects | abstract slides |
10h00-10h30 | Coffee break | ||
Session chair: Michael Spear | |||
10h30-11h20 | Hagit Attiya (Technion, Israel) | Keynote: Fences and RMRs Required for Synchronization | abstract slides |
11h20-11h40 | Basem Assiri and Costas Busch | Approximately Opaque Multi-version Transactional Memory | pdf slides |
11h40-12h00 | Emilio Villegas, Alejandro Villegas, Maria Angeles Navarro, Rafael Asenjo, Yash Ukidave and Oscar Plata | Energy Effciency of Software Transactional Memory in a Heterogeneous Architecture | pdf slides |
12h00-14h00 | Lunch break | ||
Session chair: Sebastiano Peluso | |||
14h00-14h50 | Derek Williams (IBM) | Keynote: POWER8's HTM: Architecture and Implementation | |
14h50-15h10 | Nick Armstrong, Vincent Gramoli and Pascal Felber | Space-Constrained Structures for HTM | pdf slides |
15h10-15h30 | Coffee break | ||
Session chair: Costas Busch | |||
15h30-15h50 | Alexander Spiegelman, Guy Golan-Gueta and Idit Keidar | Transactional Data Structure Libraries: Extended Abstract | pdf slides |
15h50-16h10 | Bapi Chatterjee | Lock-free Linearizable 1-Dimensional Range Queries | pdf slides |
16h10-16h15 | Closing remarks |
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